Application Ser. No. 08/639,580 is hereby incorporated herein by reference. There is an ongoing need for testing electrical continuity between a conductive path on an integrated circuit and a corresponding conductive path on a printed circuit board, or on a ceramic substrate or on some other interconnecting assembly. One common approach to IC functional testing that can include continuity testing is boundary scan testing, in which additional circuitry is added to an IC for serially sending and receiving test information. Boundary scan testing requires additional circuitry, requires power during testing, requires a test to be developed that in turn requires some knowledge of the circuit design, and is primarily intended for digital circuitry. Another approach is to use automated cross-sectional analysis of X-ray images of solder joints. X-ray analysis is unique in that it can provide information on solder joint quality and hidden flaws that might lead to future failures. However, some proposed methods of directly bonding chips to substrates use conductive adhesive instead of solder. Some present X-ray solder joint analyzers have insufficient resolution to reliably image the contact area of direct bonded chips, which is typically much smaller than the contact area of typical through-hole or surface mount packages. In addition, new X-ray imaging techniques may be required since silver based conductive adhesives are typically much more transparent to X-rays than lead based solder.
Of particular interest to the invention are dedicated continuity testers and multipurpose in-circuit testers that provide unpowered continuity testing of loaded printed circuit boards. In one common arrangement for continuity testing, two types of "probes" are used for providing electronic stimulus signals and for measuring electronic responses. The first type of probe makes ohmic contact with conductive surfaces within the electronic assembly. A sharp pointed "nail" is used to penetrate thin insulating coatings and make ohmic contact with a trace or pad on a printed circuit board. The second type of probe does not make an ohmic contact, but instead induces or measures electromagnetic fields near the electronic devices being tested. For example, a capacitive probe may be used to induce a test signal onto an internal lead frame or internal bond wires of an integrated circuit. In this application, the terms "probe" or "test probe" may mean a device for ohmic contact or a device for inducing or measuring an electromagnetic field. An example of a commercially available printed circuit board continuity tester using "bed-of-nails" fixtures and capacitive probes is the 3070 Series II Test System from Hewlett-Packard Company with HP TestJet capacitive probes. An example of the use of capacitive probes for verifying the integrity of connections for integrated circuits may be found in U.S. Pat. No. 5,254,953 (Identification Of Pin-Open Faults By Capacitive Coupling Through The Integrated Circuit Package) issued Oct. 19, 1993 to David T. Crook, Kevin W. Keirn, and Ugur Cilingiroglu (Crook et al). An additional example in which a capacitive probe includes a shield or guard and a buffer circuit may be found in U.S. Pat. No. 5,420,500 (Capacitive Electrode System for Detecting Open Solder Joints in Printed Circuit Assemblies) issued May 30, 1995 to Ronald K. Kerschner (Kerschner).
In order to verify that a conductive path on an integrated circuit is connected to a circuit assembly, a capacitive probe must be able to induce or detect a measurable signal on the conductive path. In the example embodiment disclosed in Crook et al, the capacitance between the capacitive probe and the conductive path for a good connection is typically in the range of 40-200 femtofarads and the capacitance between the capacitive probe and the conductive path for an open connection is typically less than 20 femtofarads. Although a current or voltage may be measured rather than capacitance, these numbers provide an indication of the typical surface area and spacing needed to ensure that an induced signal can be distinguished from noise.
Capacitive probes of the type disclosed in Crook et al are typically used to capacitively couple primarily to the internal lead frame and bonding wires of an IC package. Typically, internal conductive surfaces (lead frame and bonding wires), separated from the capacitive probe by the insulating material in the integrated circuit package, provide sufficient capacitive coupling to ensure a measurable signal. However, some integrated circuit packages may have a heat sink attached. Alternatively, some integrated circuit packages may have an internal conductive shield for reduction of radio frequency interference or temperature control. If a heat sink or internal shield is floating, the heat sink or shield may act as a large series capacitor, and testing may still be performed. However, if a heat sink or internal shield is grounded or connected to a common signal return, the heat sink or shield may interfere with the function of a capacitive probe by partially or completely shielding the internal lead frame and bonding wires.
In general, the capacitance between the lead frame and bonding wire for the lead of interest must be much greater than stray capacitance. For packages having external edge leads, it may be possible to capacitively couple to the external leads. For example, see the Kerschner patent referenced above, and in particular, FIG. 6 of Kerschner and the related discussion in column 7 of Kerschner. However, some IC packages may not have edge leads. For example, some integrated circuit packages use pin-grid arrays or ball-grid arrays on the bottom of the package. In addition, some integrated circuit mounting techniques eliminate the lead frame. For example, gold studs on IC bonding pads may be directly bonded to a substrate with a flexible conductive adhesive. Alternatively, short bonding wires may be used for thermal stress relief. Variations of attaching an IC directly to a substrate are sometimes called "flip-chip" mounting. In general, pin-grid array mounting, ball-grid array mounting, and direct attachment of IC's to a substrate reduce the measurable capacitive signal below the noise level.
There is a need for testing of electrical continuity of integrated circuit conductors for packages that include grounded heat sinks or grounded internal shields and for integrated circuits that are directly bonded to a substrate (without a lead frame).